MAX6664AEE+T【PDF 14/24 页】IC TEMP MON FAN CNTRL 16-QSOP

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Temperature Monitors and

PWM Fan Controllers

14 ______________________________________________________________________________________

Table 15. Power-On Default Conditions

MAX6653

MAX6663

MAX6664

Temperature Monitoring

Monitoring at 4Hz

PWM Output

Low

High

PWM Mode

PWM duty cycle control mode

Automatic fan speed control mode

Duty cycle setting (not

enabled until a 1 is written

to Bit 0 of Register 00h)

33%

100%

Automatic

PWM Polarity

Inverted

(100% duty cycle = output high)

Not Inverted

(100% duty cycle = output low)

Not Inverted

(100% duty cycle = output low)

Alarm Speed

For the MAX6663, the alarm speed bit, bit 0 of status

100%, excluding the case of fan spin-up. For the

MAX6653/MAX6664, this bit indicates that the THERM

output is low. Once this bit is set, the only way to clear it

is by reading status register 1. However, the bit does

not reassert on the next monitoring cycle if the condi-

tion still exists. It does assert if the condition is discon-

tinued and then returns.

Power-On Default Conditions

At power-up, the MAX6653/MAX6663/MAX6664 are

monitoring temperature to protect the system against

thermal damage. The PWM outputs are in known states.

Note that although the "Monitoring" bit (Configuration

does not begin until a 1 is rewritten to Bit 0.

Other default conditions as listed in the Register Summary

section.

After applying power to the MAX6653/MAX6663/

MAX6664, set the desired operating characteristics (fan

configuration, alarm thresholds, etc.). Write to

Configuration register 1 last. When a 1 is first written to

Bit 0 of this register, fan control will commence as

determined by the register contents.

PC Board Layout

Follow these guidelines to reduce the measurement

error of the temperature sensors:

1) Place the MAX6653/MAX6663/MAX6664 as close

as is practical to the remote diode. In noisy environ-

ments, such as a computer motherboard, this dis-

tance can be 4in to 8in (typ). This length can be

increased if the worst noise sources are avoided.

Noise sources include CRTs, clock generators,

memory buses, and ISA/PCI buses.

2) Do not route the DXP-DXN lines next to the deflec-

tion coils of a CRT. Also, do not route the traces

across fast digital signals, which can easily intro-

duce 30癈 error, even with good filtering.

3) Route the DXP and DXN traces in parallel and in

close proximity to each other, away from any higher

voltage traces, such as 12VDC. Leakage currents

from PC board contamination must be dealt with

carefully since a 20M& leakage path from DXP to

ground causes about 1癈 error. If high-voltage traces

are unavoidable, connect guard traces to GND on

either side of the DXP-DXN traces (Figure 6).

4) The 10-mil widths and spacing recommended in

Figure 6 are not absolutely necessary, as they offer

only a minor improvement in leakage and noise over

narrow traces. Use wider traces when practical.

5) Add a 200& resistor in series with VCC for best

noise filtering (see Typical Operating Circuits).

MINIMUM

10 MILS

GND

DXN

DXP

GND

Figure 6. Recommended DXP/DXN PC Traces

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